Squared_Link. SDR platform
SDR platform Squared_Link is a digital transceiver intended for implementation in wireless modems. Embedded software of Squared_Link is a multimode OFDM transceiver based on OFDM technology, it can work in wideband, narrowband modes, spread spectrum mode and fragmented spectrum mode. Hardware of Squared_Link is based on Altera's Cyclone V FPGA and AD9361 transceiver. Evaluation kit Squared_Modem includes RF board and motherboard with Ethernet interface, it can be used as standalone solution too.
- Communication technology: scaled OFDM1024 with unique technology for mixing of wideband, narrowband, spread spectrum and fragmented spectrum signals in one air link frame. (Learn more about OFDM_MultiMode).
- Duplexing mode: TDD or FDD.
- Bandwidth: 1-20 MHz (smoothly variable).
- Modulation: BPSK; QPSK; 8QAM; 16QAM; 64QAM; 256QAM.
- FEC: LDPC.
- Maintaining coding rates: 1/2; 2/3; 3/4; 5/6.
- Spread spectrum mode features:
- spreading factor: any even number in range from 2 to 106;
- SNR (BER=10-6, spreading factor 106): -17 dB;
- maximal signal search duration: 1 sec.
- MIMO features (maintenance depends on hardware version):
- number of antennas: 2;
- working modes: SISO, SIMO, MISO, MIMO;
- space time code in MISO and MIMO modes: Alamouti code.
- Air link frame duration: 2-20 ms.
- Cyclic prefix duration: 1/32; 1/16; 1/8; 1/4.
- Carrier frequency range: 70-6000 MHz.
- Maximal TX output power: -6 dBm.
- RX sensitivity depends on bandwidth, modulation, FEC rate and LNA performance (see Squared_Link. Brief description).
- Information bandwidth depends on bandwidth, modulation and FEC rate (see Squared_Link. Brief description).
- Network configurations: P2P; PMP; mesh networking.
- universal: GMII; RGMII; MII; RMII; 1,2,4,8 bits wide bus;
- control: USB, UART;
- debug: JTAG.
- Downloadable by user:
- preamble modulation sequence;
- spreading codes for spread spectrum mode;
- pilot subcarriers modulation sequence;
- pilot and informational subcarriers location.
- Available statistical information about channel:
- input signal samples;
- spectrum of useful signal;
- spectrum analyzer mode;
- timing offset;
- frequency offset;
- FEC FER;
- FEC decoder iterations number;
- TX-RX range calculated from signal delay.
- Power: 3.3 V.
- Available hardware versions:
- 5CEBA5 FPGA (only SISO mode with bandwidth up to 12 MHz);
- 5CEBA7 FPGA (SISO, SIMO, MISO);
- 5CEBA9 FPGA (SISO, SIMO, MISO, MIMO).
- Power consumption: 2.9 W (12 MHz bandwidth, TDD mode 50/50, 5CEBA7 FPGA).
- Physical dimensions: 55x40x8 mm.